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Introduction to FPGA Design for Embedded Systems Quiz Answers
All Weeks Introduction to FPGA Design for Embedded Systems Quiz Answers
Introduction to FPGA Design for Embedded Systems Week 01 Quiz Answers
Mission 002: Week 1 Quiz Answers
Q1. What was missing in CPLDs that created a need for devices like FPGAs ?
- Designs that required many flip-flops
- Designs that contained large amounts of sequential circuits
- All of the above
Q2. Which of the following characterize FPGAs ? (Select all that apply)
- LUTs
- Scales easily to larger devices
- Predictable
- Rich with FFs/registers
- Easy to design with
- Deterministic
Q3. Fill in the table so that the LUT implements:
F = (~A & B) | (~C & ~D)
a = __
b = __
c = __
d = __
e = __
Enter your numerical answers separated by a comma
Q4. Which of the following characteristics best match an ASIC and which of the following match an ASSP device?
- ASIC: is a semiconductor device integrated circuit (IC) product that is dedicated to a specific company
- ASSP: PLD with a fixed OR plane and a programmable AND plane
- ASIC: is a semiconductor device integrated circuit (IC) product that is dedicated to a specific company
- ASSP: Is a semiconductor device integrated circuit (IC) product that is dedicated to a specific application market and sold to more than one user
- ASIC: PLDs that are an integrated circuit designed to be configured by the designer after manufacturing and made up of memory elements (LUTs)
- ASSP: Is a semiconductor device integrated circuit (IC) product that is dedicated to a specific application market and sold to more than one user
- ASIC: PLD with a fixed AND plane and a programmable OR plane
- ASSP: Is a semiconductor device integrated circuit (IC) product that is dedicated to a specific application market and sold to more than one user
Q5. Which of the following characteristics best matches PROM and which of the following best match a PAL ?
- PAL :PLD with a fixed AND plane and a programmable OR plane
- PROM :is a semiconductor device integrated circuit (IC) product that is dedicated to a specific application market and sold to more than one user
- PAL :PLD with a fixed OR plane and a programmable AND plane
- PROM :PLDs with multiple PALs in the same package with registered outputs and an interconnecting programmable fabric
- PAL :PLD with a fixed AND plane and a programmable OR plane
- PROM :PLD with a fixed OR plane and a programmable AND plane
- PAL :PLD with a fixed OR plane and a programmable AND plane
- PROM :PLD with a fixed AND plane and a programmable OR plane
Q6. Which of the following is the best definition for a CPLD ?
- A device with multiple PALs in same package with registered outputs and interconnecting programmable fabric
- A device with a combination of fully re-programmable AND/OR array and a bank of macrocells that perform combinational and sequential logic
- An array of programmable logic blocks, and a hierarchy of reconfigurable interconnects that allow the blocks to be “wired together”, like many logic gates that can be inter-wired in different configurations
Q7. Select 3 characteristics that are associated with Antifuse FPGAs ?
( Select all that apply )
- High Reliability
- Highest Density
- Reprogrammable
- Expensive
- One time Programmable (OTP)
- Lowest Cost
Q8. How many4-input LUTs with single outputs will be required to implement a 2-bit full adderwith carry?
- 2
- 4
- 1
- 3
Q9. Does the usage of LUTS for implementation of adders with respect to gates improve delay or performance? Select all that apply..
- decreases delay
- increases delay
- increases performance
- decreases performance
Q10. Which of the characteristics match the implementation of a multiplier in an FPGA using Combinational Circuits versus Sequential Shift algorithms ? (Mark all that apply)
- Combinational circuits: Fast , Big
- Sequential Shift: Small , Slow , State Machine
- Combinational circuits: Small , Big
- Sequential Shift: Fast , Slow , State Machine
Q11. Which of the characteristics match the implementation of a multiplier in an FPGA using Speciality Circuits, such as the Booth Algorithm ? ( Mark all that apply )
- Fast
- Big
- Small
- Slow
- Complex
- Do not scale easily
- Lookup Tables
- State Machine
Q12. Which one of the following is not a programmable logic device?
- EPROM
- PLA
- CPLD
- ROM
- FPGA
Q13. What is true for ASICs relative to FPGAs? (Select all that may apply)
- Higher speeds
- Lower speed
- ASICs have lower cost per unit.
- High cost per unit
Q14. What are the principal advantages of FLASH based FPGAs over SRAM based FPGAs ? (Mark all that apply
- Faster Speed
- Lower Power
- Higher Reliability
- Better Security
Q15. Which of the following is the best implementation for a 2-bit full adder. Hint: make sure to pay attention to signal names as well as circuit diagram.
.
.
Q16. Choose the best implementation of the logic equation
(NOT(A) AND NOT(B)) OR (C AND NOT(D))
using PLA options:
.
.
.
Q17. Choose the correct implementation of logic equation
((A) AND (C)) OR (NOT(B) AND D)
using PLA options:
.
.
.
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